Marvell this week launched a new IP technology platform tailored for custom chips to accelerate infrastructure based on TSMC’s 2-nanometer process technology, which may include N2 and N2P. The platform includes the technology necessary to develop cloud-optimized accelerators, Ethernet switches and digital signal processors.
“The 2nm platform will enable Marvell to deliver highly differentiated analog, mixed-signal and foundational IP to build accelerated infrastructure,” said Sandeep Bharathi, chief development officer at Marvell.”Our collaboration with TSMC on 5nm, 3nm and now 2nm platforms helps Marvell push the boundaries of silicon technology.“
The 2nm platform is built on Marvell’s broad IP portfolio, which includes advanced SerDes with speeds exceeding 200 Gbps, processor subsystems, cryptographic engines, SoC fabrics and high-bandwidth physical layer interfaces. These IPs are critical to the development and production of a range of devices, such as custom compute accelerators and optical interconnect digital signal processors. These are becoming common building blocks for AI clusters, cloud data centers, and other infrastructure supporting machines for AI and high-performance computing workloads.
While these IPs are critical to a variety of processors, DSPs, and networking devices, developing them from scratch (especially for TSMC’s 2-nanometer process technology that relies on all-gate Nanosheet transistors) is difficult and time-consuming, sometimes starting from Inefficient from a mold space and economics perspective. Marvell’s IP portfolio is expected to play a large role in this.
Marvell has not directly stated that its TSMC 2nm certified platform has been silicon verified, but considering that TSMC has been working with IP providers for N2 compatible IP for quite some time, it is reasonable to expect that at least some of Marvell’s popular IP has.
“We take a modular approach to semiconductor design and development, focusing first on qualified basic analog, mixed-signal IP and advanced packaging that can be used in a variety of devices,“Bharati said.”This allows us to bring innovations such as process manufacturing advancements to market faster.“
At the same time, Marvell is not a member of the TSMC Open Innovation Platform and OIP IP Alliance, so it is unclear whether the company’s N2-compatible IP will become part of TSMC’s TSMC9000 IP plan, which greatly simplifies IP selection for chip designers.
“TSMC is pleased to partner with Marvell to create a platform to advance the acceleration infrastructure of our 2nm process technology,” Said Kaiwen Zhang, senior vice president of business development at TSMC.”We look forward to continuing our collaboration with Marvell to develop leading connectivity and computing products utilizing TSMC’s best-in-class process and packaging technologies.“
Source: Marvell